岗位描述
Job Responsibility:
岗位职责:
1. Develop performance model & function model for NPU IP.
负责NPU IP的性能模型与功能模型开发
2. Engineer performance models for architectural and micro-architectural levels.
负责不同业务场景下架构和微架构的性能建模
3. Performance analysis and correlation with SW & HW implementation.
开展性能分析,并与软件、硬件实现进行对标
4. Support function model debug with both simulation test and software test.
支持功能模型调试,涵盖仿真测试与软件测试
5. Work closely with cross-functional teams including hardware design, verification and software team.
与硬件设计、验证、软件等跨职能团队紧密协作
Job Requirements:
任职要求:
1. Master's degree or above, majoring in Electronic Engineering, Microelectronics, Computer Science, Communication Engineering or related fields.
硕士及以上学历,电子工程、微电子、计算机科学、通信工程或相关专业
2. Familiarity with hardware description languages, including Verilog/System Verilog.
熟悉Verilog/SystemVerilog等硬件描述语言
3. Familiarity with software programming language, such as C/C++/SystemC.
熟悉C/C++/SystemC等软件编程语言
4. Proficiency with at least one script language, e.g. Shell, Python, Go, Ruby, etc.
至少熟练掌握一种脚本语言,如Shell、Python、Go、Ruby等
5. In-depth understanding of at least one processor type (CPU/GPU/NPU/GPGPU).
熟悉至少一种处理器架构(CPU/GPU/NPU/GPGPU)的微架构特性
6. Understanding of mainstream neural network models (CNN, Transformer, LLM, etc.); research or project experience preferred.
对主流神经网络模型(如CNN、Transformer、LLM等)有一定理解,并有相关研究或实践经验
7. Working under pressure and teamwork spirit.
具备良好的抗压能力与团队合作精神
Job Location: Shanghai / Shenzhen
工作地点:上海/深圳