岗位描述
Responsibilities:
1. Implementation of DFT functions such as SCAN/ATPG, MBIST and Analog macro test.
2. DFT test pattern generation and verification.
3. Generate DFT related timing constraints and work with backend team for DFT timing closure.
4. Support test engineer for ATE test and pattern debug.
Requirements:
1. Good knowledge of SCAN ATPG/MBIST and other related DFT techniques.
2. Good knowledge of digital SoC/ASIC design flow, including RTL coding, verification, synthesis, STA, etc.
3. Scripting skills such as TCL, Perl, Shell, etc.
4. Familiar with DFT EDA tools, such as Tessent, DFT Compiler/TetraMAX.
5. Experiences on ATE test is a plus.