锦鲤求职岗位描述
PLL/CDR Architecture/Circuit Design:
Develop PLL/CDR architectures and design circuits like VCOs, charge pumps, phase detectors, DTC/TDC, loop filters, phase interpolators and clock distribution, optimizing for power consumption, area, and performance.
• Circuit Simulation and Analysis:
Conduct detailed simulations using tools like Spectre or HSPICE to verify performance metrics like phase noise, lock time, and frequency stability.
• Layout and Verification:
Collaborate with layout designers to ensure proper circuit placement and routing while considering critical design constraints like power integrity and signal integrity.
• Design Validation:
Perform post-layout simulations and measurements on silicon prototypes to validate circuit functionality against design specifications.
• Performance Optimization:
Analyze trade-offs between different design choices and optimize for specific application requirements, such as low power, high bandwidth, or low jitter.
• Collaboration with Cross-Functional Teams:
Work with system architects, RF engineers, and verification engineers to integrate PLL/CDR designs into larger SoC systems.
Required Skills and Qualifications:
• Strong understanding of PLL theory and design principles
• Expertise in analog circuit design, including transistor-level design and layout techniques
• Proficiency in EDA tools like Cadence Virtuoso, Synopsys Custom Compiler, and simulation tools like Spectre or HSPICE
• Experience with mixed-signal design and verification methodologies
• Familiarity with advanced process technologies and device characteristics is a plus
• Excellent problem-solving and analytical skills
• Master or PhD degree in electrical engineering with a focus on analog circuit design