锦鲤求职锦鲤求职

加特兰

SoC Physical Design Engineer/SoC物理设计工程师-2027届

让 AI 辅助填写这个岗位的官网网申

使用同一份求职档案填写教育、实习与项目经历;登录、验证码和缺失信息由你处理,最终提交前请本人核对确认。

当前公开岗位库收录 加特兰 26 个在招校招岗位。岗位数量与状态以企业官网为准。

也可以勾选下方同企业岗位,一起准备网申 →

是否提交成功以企业官网回执或申请记录为准。

岗位描述

【Job Description】

We are recruiting outstanding fresh graduates majoring in Microelectronics or EE , to join Digital physical design team. Candidate will participate in full digital physical implementation flow, including synthesis/floorplan/placement/cts/routing/STA/PhyV/Power IREM for advanced SOC and ASIC projects. Trainings and project experiences are provided for candidates as well.

【Responsibilities】

1. Full-flow digital physical design , including Synthesis, Floorplan, CTS, Routing and PostRoute optimization.

2. Static Timing Analysis, timing closure, including setup/hold/and other miscellaneous check fixing.

3. Physical verification including DRC/LVS/Antenna/ERC/Perc/DFM.

4. Power IREM analysis and fixing for chip robustness and yield improvement.

5. Work closely with Front-End team,IP team and Package Team to solve cross function issues.

6. Scripting productively for flow maintenance and efficiency improvement.

【Requirement】

1. MS in Microelectronics/EE or related majors , 2026 fresh graduates.

2. Logical thinking, patient and rigorous work attitude, strong problem-solving ability ,good team work and communication skills.

3. Solid understanding of VLSI, Timing Constraints, Solid Circuit, semiconductor physical design basics.

4. Familiar with full backend implementation flow.

5. TCL Scripting; basic Python is preferred.

6. Good English skills is preferred.

半导体/芯片方向的申请准备

先核对岗位要求与自己的经历,再准备档案、投递和面试。

阅读求职步骤与示例 →