锦鲤求职岗位描述
岗位职责
In this role, you will work with software and hardware engineering groups to define the cutting edge of next-generation AI SOC chips for high-performance computing platform in Data Center.
* as a design engineer, strong coding skill of system Verilog or Verilog to implement RTL design, develop SOC domain system/interface IP for various SOCs
* familiar with ASIC flow to create complex SOCs with advanced methodologies more efficient, participated 3rd party IP integration
* strong problem solving and solution for SOC design and IP integration, timing closure, silicon bring up and issue debug
* Documents the high-level architecture specification that defines the chip with various sub-systems for the cutting-edge cloud applications.
* Works closely with PD, power, system, and verification team to bring up the subsystem
任职要求
* Minimum of 5 years of experience on complex SOC design for proven silicons.
* Strong experience on following domain: CPU, GPU, PCIe, Memory, Network.
* Experience on one or more of following domain: AXI 4.0(or higher), NOC, Coherency, Virtualization, Security, RAS, power management, SerDes, PHY.
* Good verbal and written skill for communication
* Hands-on experience on the performance simulation and analysis is a good plus
* Server grade design, familiar with CLK/RESET tree implement, SPI/GPIO/UART/I3C peripheral IO is a plus.