Lead Product Validation Engineer

在捷普，我们打造品牌，打造世界——这也就是为什么我们会成为技术上最领先和最可信赖的制造解决方案提供商。不管我们服务的对象是全世界最大最知名的品牌还是最新潮的技术初创公司，我们的决心永远不会动摇。我们与这些品牌的愿景是相一致的，那就是：打造一个更好的、更安全的、更干净的地球。

At Jabil (NYSE: JBL), we are proud to be a trusted partner for the world's top brands, offering comprehensive engineering, supply chain, and manufacturing solutions. With 60 years of experience across industries and a vast network of over 100 sites worldwide, Jabil combines global reach with local expertise to deliver both scalable and customized solutions. Our commitment extends beyond business success as we strive to build sustainable processes that minimize environmental impact and foster vibrant and diverse communities around the globe.

Job Description

The lead owns project validation will be able to technically lead the entire cross functional design team on their interactions and responsibilities for that project. A Lead Engineer is responsible for ensuring the phase gate technical milestones are met, is the leader of technical reviews, and is responsible for making sure that the specification requirements inputs and design outputs align. This engineer will have demonstrated experience at releasing products into a production environment.

Key Responsibilities

Principle points of contact to external team, partners and customer

PV Test resource (Tools/Human/Equipment) management and Build Plan

PV Test Execution Schedule/Status/Risk/Issue management

PV PRD Consolidated Feedback

PV RFI/RFQ Consolidated Feedback

Lead Function TFs and TEs to create and manage validation plan

Create test plan and generate test report

PV team defect quality

Project CL/CI

Provide test requirements and review supplier test methodology

Limitation/deferral defect discussion with project team

Job Requirements

Bachelor's degree in engineering from an accredited four-year college or university

Over 10 years of related experience and/or training

Strong communication skills in both English and Mandarin, communication and project management skills, able to arrange overall test execution during whole engineering design phase.

Good Excellent understanding on design verification test development. Able to create test plan, regression plan focus on solutions, procedures & coordinate with design and validation team cross Taiwan, and USA.

Able to hands-on verification activities on designing, building and executing test plans and scenarios.

Will understanding chipset spec from Broadcom, Nvidia, Intel, Vitesse, PMC Sierra, Marvell, etc.

Excellent knowledge for SAS, SATA, PCIe, Ethernet (1G/10G/25G /40G/100G), iSCSI, RAID 0,1,5,6, 10, Fiber Channel, Battery Backup cache…..etc.

Expertise on IOMeter, Netbench, WHQL HCT, Drive pull tests, Failover, Network boot, PXE, CIFS, NFS, LUN Masking / mapping, Disk Sparing, Zoning, User I/F (CLI, WEB, telnet), SNMP traps, IPSEC, MS ISCSI Initiator etc….

Familiar AMI, Phoenix or Award BIOS structure, Windows OS, Suse, Redhat and windows & Linux configuration, installation procedure, network configuration, driver configuration, etc.

Well Knowledge on shock & vibration, thermal, acoustic, package drop tests, EMC Safety pre-scan, certification, WHQL certification.

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捷普，包括其子公司，是一个就业机会均等的雇主，在考虑候选人是否符合雇佣标准时，种族、肤色、宗教信仰、国籍、性别、性取向、性别认同、性别、年龄、残疾、遗传、退伍军人身份和其他所有受法律保护的特征均不会被考虑在内。

Accessibility Accommodation

If you are a qualified individual with a disability, you have the right to request a reasonable accommodation if you are unable or limited in your ability to use or access Jabil.com/Careers site as a result of your disability. You can request a reasonable accommodation by sending an e-mail to Always_Accessible@Jabil.com with the nature of your request and contact information. Please do not direct any other general employment related questions to this e-mail. Please note that only those inquiries concerning a request for reasonable accommodation will be responded to.

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